TPL51201-S

3-A Sink and Source DDR Termination Regulator

数据手册

概述
开发资源
应用
订购明细

概述

With the development of main processors in PCs and servers, more and more source double-data-rate (DDR) memories are required in the mainboard, where the input voltage becomes lower and lower, and space limitation becomes higher and higher.

The TPL51201 series devices are 3-A sink and source DDR termination regulators specifically designed for the DDR applications with heavy space limitation. The TPL51201 series devices implement a fast load-transient response and only requires a minimum output capacitance of 20 μF.

The TPL51201 series devices support a remote-sensing function and all power requirements for DDR VTT bus termination. In addition, the TPL51201 series devices provide an open-drain PG signal for VTT regulation indication and an EN signal that can be used to discharge VTT for DDR applications.

The TPL51201 series devices are available in the thermally efficient 10-pin 3×3 DFN package with thermal pad, and support the operating temperature range from –40°C to +125°C.

Status

Production
Rating

Industrial
Minimum Input Voltage (V)

2.375
Maximum Input Voltage (V)

5.5
Output Voltage (V)

Adjustable (REFIN)
Accuracy (max)

±25mV
Maximum Output Current (mA)

±3000
Iq (typ) (mA)

0.8
Dropout (typ) (mV)

/
PSRR @ 1kHz (dB)

/
Noise (μVRMS)

/
Temperature Range (°C)

-40 to +125
Feature

/
Package

DFN3X3-10

开发资源

文档

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- 日期
- Datasheet_TPL51201-S
  
  数据手册
  
  英文
  
  03/26/2024
  
  3-A Sink and Source DDR Termination Regulator
- Introduction to Latch-up and the Preventive Measures
  
  技术文章
  
  英文
  
  01/19/2024
- PSRR Measurement for LDO
  
  技术文章
  
  英文
  
  01/19/2024
- Application Tips on ESD-EOS
  
  技术文章
  
  英文
  
  01/19/2024
- 3PEAK Analog Products Selection Guide
  
  选型手册
  
  中文
  
  01/19/2024