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概述
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开发资源
概述
The 3PA9280 is a monolithic, single-supply, 8-bit, 32-MSPS analog-to-digital converter with an on-chip sample-and-hold amplifier and a voltage reference. The 3PA9280 uses a multi-stage differential pipeline architecture at 32-MSPS data rates, and guarantees no missing codes over the full operating temperature range.
The input of the 3PA9280 is designed to ease the development of both imaging and communications systems. Users can select a variety of input ranges and offsets, and can drive the single-ended or differential input. The sample-and-hold amplifier (SHA) is equally suited for both multiplexed systems that switch full-scale voltage levels in successive channels and sampling single-channel inputs at frequencies up to and beyond the Nyquist rate. AC-coupled input signals can be shifted to a predetermined level, with an onboard clamp circuit. The dynamic performance is excellent.
The 3PA9280 has an onboard programmable reference. An external reference can also be chosen to suit the DC accuracy and temperature drift requirements of the application.
A single clock input is used to control all internal conversion cycles. The digital output data is presented in straight binary output format. An out-of-range signal (OTR) indicates an overflow condition which can be used with the most significant bit to determine a low or high overflow.
The 3PA9280 operates with a supply ranging from +2.7 V to +5.5 V, suited for low-power operation in high-speed applications. The 3PA9280 is specified over the industrial temperature range from –40°C to +85°C.
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Status
NRND
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Rating
Industrial
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Resolution
8
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Update Rate (MSPS)
32
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CH
1
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Interface
Parallel
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VIN (V)
0~2
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DNL (LSB)
0.2
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SINAD (dB)
49
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VDD (V)
2.7~5.5
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Power (mW)
85
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Datum
Internal
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Package
SSOP28
开发资源
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文档
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显示筛选器隐藏筛选器文档
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数据手册
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选型手册
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应用笔记
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技术文章
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产品简介
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用户指南
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测试报告
- 文档名称
- 类型
- 语言
- 日期
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数据手册英文01/06/2025
CMOS A/D converter
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技术文章英文01/19/2024
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技术文章英文01/19/2024
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选型手册中文01/19/2024
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